return strdup (
"=PC     pc\n"
"=SP     sp\n"
"=BP     fp\n"
"=A0     x0\n"
"=A1     x1\n"
"=A2     x2\n"
"=A3     x3\n"
"=ZF     zf\n"
"=SF     nf\n"
"=OF     vf\n"
"=CF     cf\n"
"=SN     x16\n"
"flg     cpsr    .32     4       0   _____tfiae_____________j__qvczn\n"
"flg     vf      .1      4.28    0       overflow\n"
"flg     cf      .1      4.29    0       carry\n"
"flg     zf      .1      4.30    0       zero\n"
"flg     nf      .1      4.31    0       sign\n"
"gpr     x0      .64     8       0\n"
"gpr     x1      .64     16      0\n"
"gpr     x2      .64     24      0\n"
"gpr     x3      .64     32      0\n"
"gpr     x4      .64     40      0\n"
"gpr     x5      .64     48      0\n"
"gpr     x6      .64     56      0\n"
"gpr     x7      .64     64      0\n"
"gpr     x8      .64     72      0\n"
"gpr     x9      .64     80      0\n"
"gpr     x10     .64     88      0\n"
"gpr     x11     .64     96      0\n"
"gpr     x12     .64     104     0\n"
"gpr     x13     .64     112     0\n"
"gpr     x14     .64     120     0\n"
"gpr     x15     .64     128     0\n"
"gpr     x16     .64     136     0\n"
"gpr     x17     .64     144     0\n"
"gpr     x18     .64     152     0\n"
"gpr     x19     .64     160     0\n"
"gpr     x20     .64     168     0\n"
"gpr     x21     .64     176     0\n"
"gpr     x22     .64     184     0\n"
"gpr     x23     .64     192     0\n"
"gpr     x24     .64     200     0\n"
"gpr     x25     .64     208     0\n"
"gpr     x26     .64     216     0\n"
"gpr     x27     .64     224     0\n"
"gpr     x28     .64     232     0\n"
"gpr     fp      .64     240     0\n"
"gpr     lr      .64     248     0\n"
"gpr     sp      .64     256     0\n"
"gpr     pc      .64     264     0\n"
"fpu     v0      .128    272     0\n"
"fpu     v1      .128    288     0\n"
"fpu     v2      .128    304     0\n"
"fpu     v3      .128    320     0\n"
"fpu     v4      .128    336     0\n"
"fpu     v5      .128    352     0\n"
"fpu     v6      .128    368     0\n"
"fpu     v7      .128    384     0\n"
"fpu     v8      .128    400     0\n"
"fpu     v9      .128    416     0\n"
"fpu     v10     .128    432     0\n"
"fpu     v11     .128    448     0\n"
"fpu     v12     .128    464     0\n"
"fpu     v13     .128    480     0\n"
"fpu     v14     .128    496     0\n"
"fpu     v15     .128    512     0\n"
"fpu     v16     .128    528     0\n"
"fpu     v17     .128    544     0\n"
"fpu     v18     .128    560     0\n"
"fpu     v19     .128    576     0\n"
"fpu     v20     .128    592     0\n"
"fpu     v21     .128    608     0\n"
"fpu     v22     .128    624     0\n"
"fpu     v23     .128    640     0\n"
"fpu     v24     .128    656     0\n"
"fpu     v25     .128    672     0\n"
"fpu     v26     .128    688     0\n"
"fpu     v27     .128    704     0\n"
"fpu     v28     .128    720     0\n"
"fpu     v29     .128    736     0\n"
"fpu     v30     .128    752     0\n"
"fpu     v31     .128    768     0\n"
"gpr     fpcr    .32     784     0\n"
"gpr     fpsr    .32     788     0\n"
"drx     bcr0    .32     792     0\n"
"drx     bcr1    .32     796     0\n"
"drx     bcr2    .32     800     0\n"
"drx     bcr3    .32     804     0\n"
"drx     bcr4    .32     808     0\n"
"drx     bcr5    .32     812     0\n"
"drx     bcr6    .32     816     0\n"
"drx     bcr7    .32     820     0\n"
"drx     bvr0    .64     824     0\n"
"drx     bvr1    .64     832     0\n"
"drx     bvr2    .64     840     0\n"
"drx     bvr3    .64     848     0\n"
"drx     bvr4    .64     856     0\n"
"drx     bvr5    .64     864     0\n"
"drx     bvr6    .64     872     0\n"
"drx     bvr7    .64     880     0\n"
"drx     wcr0    .32     888     0\n"
"drx     wcr1    .32     892     0\n"
"drx     wvr0    .64     896     0\n"
"drx     wvr1    .64     904     0\n"
);