(kicad_pcb
	(version 20241229)
	(generator "pcbnew")
	(generator_version "9.0")
	(general
		(thickness 1.6)
		(legacy_teardrops no)
	)
	(paper "A4")
	(layers
		(0 "F.Cu" signal)
		(2 "B.Cu" signal)
		(9 "F.Adhes" user "F.Adhesive")
		(11 "B.Adhes" user "B.Adhesive")
		(13 "F.Paste" user)
		(15 "B.Paste" user)
		(5 "F.SilkS" user "F.Silkscreen")
		(7 "B.SilkS" user "B.Silkscreen")
		(1 "F.Mask" user)
		(3 "B.Mask" user)
		(17 "Dwgs.User" user "User.Drawings")
		(19 "Cmts.User" user "User.Comments")
		(21 "Eco1.User" user "User.Eco1")
		(23 "Eco2.User" user "User.Eco2")
		(25 "Edge.Cuts" user)
		(27 "Margin" user)
		(31 "F.CrtYd" user "F.Courtyard")
		(29 "B.CrtYd" user "B.Courtyard")
		(35 "F.Fab" user)
		(33 "B.Fab" user)
		(39 "User.1" user)
		(41 "User.2" user)
		(43 "User.3" user)
		(45 "User.4" user)
	)
	(setup
		(pad_to_mask_clearance 0)
		(allow_soldermask_bridges_in_footprints no)
		(tenting front back)
		(pcbplotparams
			(layerselection 0x00000000_00000000_55555555_5755f5ff)
			(plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000)
			(disableapertmacros no)
			(usegerberextensions no)
			(usegerberattributes yes)
			(usegerberadvancedattributes yes)
			(creategerberjobfile yes)
			(dashed_line_dash_ratio 12.000000)
			(dashed_line_gap_ratio 3.000000)
			(svgprecision 4)
			(plotframeref no)
			(mode 1)
			(useauxorigin no)
			(hpglpennumber 1)
			(hpglpenspeed 20)
			(hpglpendiameter 15.000000)
			(pdf_front_fp_property_popups yes)
			(pdf_back_fp_property_popups yes)
			(pdf_metadata yes)
			(pdf_single_document no)
			(dxfpolygonmode yes)
			(dxfimperialunits yes)
			(dxfusepcbnewfont yes)
			(psnegative no)
			(psa4output no)
			(plot_black_and_white yes)
			(sketchpadsonfab no)
			(plotpadnumbers no)
			(hidednponfab no)
			(sketchdnponfab yes)
			(crossoutdnponfab yes)
			(subtractmaskfromsilk no)
			(outputformat 1)
			(mirror no)
			(drillshape 1)
			(scaleselection 1)
			(outputdirectory "")
		)
	)
	(net 0 "")
	(net 1 "Net-(U1-V+)")
	(net 2 "unconnected-(U1-NC-Pad8)")
	(net 3 "unconnected-(U2-NC-Pad8)")
	(net 4 "Net-(U2-V+)")
	(net 5 "GND")
	(footprint "Package_SO:SOIC-8_5.3x5.3mm_P1.27mm"
		(layer "F.Cu")
		(at 75.6125 77.345)
		(descr "SOIC, 8 Pin (JEITA/EIAJ ED-7311-19 variation 08-001-BBA and Atmel/Microchip, 208 mils width, https://www.jeita.or.jp/japanese/standard/book/ED-7311-19/#target/page_no=21, https://ww1.microchip.com/downloads/en/DeviceDoc/20005045C.pdf#page=23, https://ww1.microchip.com/downloads/en/DeviceDoc/doc2535.pdf#page=162), generated with kicad-footprint-generator ipc_gullwing_generator.py")
		(tags "SOIC SO P-SOP SOP SOP-8 SO SO-8 8S2 S2AE/F K04-056 CASE-751BE SO8W 8-Pin-SOIC PSA W8-2 W8-4 W8MS-1 FPT-8P-M08")
		(property "Reference" "U2"
			(at 0 -3.6 0)
			(layer "F.SilkS")
		)
		(property "Value" "TL071"
			(at 0 3.6 0)
			(layer "F.Fab")
		)
		(property "Datasheet" "http://www.ti.com/lit/ds/symlink/tl071.pdf"
			(at 0 0 0)
			(layer "F.Fab")
			(hide yes)
		)
		(property "Description" "Single Low-Noise JFET-Input Operational Amplifiers, DIP-8/SOIC-8"
			(at 0 0 0)
			(layer "F.Fab")
			(hide yes)
		)
		(property ki_fp_filters "SOIC*3.9x4.9mm*P1.27mm* DIP*W7.62mm* TSSOP*3x3mm*P0.65mm*")
		(sheetname "/Test2/")
		(sheetfile "Test.kicad_sch")
		(attr smd)
		(fp_text user "${REFERENCE}"
			(at 0 0 0)
			(layer "F.Fab")
		)
		(pad "1" smd roundrect
			(at -3.5875 -1.905)
			(size 1.625 0.65)
			(layers "F.Cu" "F.Mask" "F.Paste")
			(roundrect_rratio 0.25)
			(net 4 "Net-(U2-V+)")
			(pinfunction "NULL")
			(pintype "input")
		)
		(pad "2" smd roundrect
			(at -3.5875 -0.635)
			(size 1.625 0.65)
			(layers "F.Cu" "F.Mask" "F.Paste")
			(roundrect_rratio 0.25)
			(net 5 "GND")
			(pinfunction "-")
			(pintype "input")
		)
		(pad "3" smd roundrect
			(at -3.5875 0.635)
			(size 1.625 0.65)
			(layers "F.Cu" "F.Mask" "F.Paste")
			(roundrect_rratio 0.25)
			(net 5 "GND")
			(pinfunction "+")
			(pintype "input")
		)
		(pad "4" smd roundrect
			(at -3.5875 1.905)
			(size 1.625 0.65)
			(layers "F.Cu" "F.Mask" "F.Paste")
			(roundrect_rratio 0.25)
			(net 4 "Net-(U2-V+)")
			(pinfunction "V-")
			(pintype "power_in")
		)
		(pad "5" smd roundrect
			(at 3.5875 1.905)
			(size 1.625 0.65)
			(layers "F.Cu" "F.Mask" "F.Paste")
			(roundrect_rratio 0.25)
			(net 4 "Net-(U2-V+)")
			(pinfunction "NULL")
			(pintype "input")
		)
		(pad "6" smd roundrect
			(at 3.5875 0.635)
			(size 1.625 0.65)
			(layers "F.Cu" "F.Mask" "F.Paste")
			(roundrect_rratio 0.25)
			(net 4 "Net-(U2-V+)")
			(pintype "output")
		)
		(pad "7" smd roundrect
			(at 3.5875 -0.635)
			(size 1.625 0.65)
			(layers "F.Cu" "F.Mask" "F.Paste")
			(roundrect_rratio 0.25)
			(net 4 "Net-(U2-V+)")
			(pinfunction "V+")
			(pintype "power_in")
		)
		(pad "8" smd roundrect
			(at 3.5875 -1.905)
			(size 1.625 0.65)
			(layers "F.Cu" "F.Mask" "F.Paste")
			(roundrect_rratio 0.25)
			(net 3 "unconnected-(U2-NC-Pad8)")
			(pinfunction "NC")
			(pintype "no_connect")
		)
		(embedded_fonts no)
		(model "${KICAD9_3DMODEL_DIR}/Package_SO.3dshapes/SOIC-8_5.3x5.3mm_P1.27mm.step"
			(offset
				(xyz 0 0 0)
			)
			(scale
				(xyz 1 1 1)
			)
			(rotate
				(xyz 0 0 0)
			)
		)
	)
	(footprint "Package_SO:SOIC-8_5.3x5.3mm_P1.27mm"
		(layer "F.Cu")
		(at 75.6125 64.345)
		(descr "SOIC, 8 Pin (JEITA/EIAJ ED-7311-19 variation 08-001-BBA and Atmel/Microchip, 208 mils width, https://www.jeita.or.jp/japanese/standard/book/ED-7311-19/#target/page_no=21, https://ww1.microchip.com/downloads/en/DeviceDoc/20005045C.pdf#page=23, https://ww1.microchip.com/downloads/en/DeviceDoc/doc2535.pdf#page=162), generated with kicad-footprint-generator ipc_gullwing_generator.py")
		(tags "SOIC SO P-SOP SOP SOP-8 SO SO-8 8S2 S2AE/F K04-056 CASE-751BE SO8W 8-Pin-SOIC PSA W8-2 W8-4 W8MS-1 FPT-8P-M08")
		(property "Reference" "U1"
			(at 0 -3.6 0)
			(layer "F.SilkS")
		)
		(property "Value" "TL071"
			(at 0 3.6 0)
			(layer "F.Fab")
		)
		(property "Datasheet" "http://www.ti.com/lit/ds/symlink/tl071.pdf"
			(at 0 0 0)
			(layer "F.Fab")
			(hide yes)
		)
		(property "Description" "Single Low-Noise JFET-Input Operational Amplifiers, DIP-8/SOIC-8"
			(at 0 0 0)
			(layer "F.Fab")
			(hide yes)
		)
		(property ki_fp_filters "SOIC*3.9x4.9mm*P1.27mm* DIP*W7.62mm* TSSOP*3x3mm*P0.65mm*")
		(sheetname "/Test1/")
		(sheetfile "Test.kicad_sch")
		(attr smd)
		(fp_text user "${REFERENCE}"
			(at 0 0 0)
			(layer "F.Fab")
		)
		(pad "1" smd roundrect
			(at -3.5875 -1.905)
			(size 1.625 0.65)
			(layers "F.Cu" "F.Mask" "F.Paste")
			(roundrect_rratio 0.25)
			(net 1 "Net-(U1-V+)")
			(pinfunction "NULL")
			(pintype "input")
		)
		(pad "2" smd roundrect
			(at -3.5875 -0.635)
			(size 1.625 0.65)
			(layers "F.Cu" "F.Mask" "F.Paste")
			(roundrect_rratio 0.25)
			(net 5 "GND")
			(pinfunction "-")
			(pintype "input")
		)
		(pad "3" smd roundrect
			(at -3.5875 0.635)
			(size 1.625 0.65)
			(layers "F.Cu" "F.Mask" "F.Paste")
			(roundrect_rratio 0.25)
			(net 5 "GND")
			(pinfunction "+")
			(pintype "input")
		)
		(pad "4" smd roundrect
			(at -3.5875 1.905)
			(size 1.625 0.65)
			(layers "F.Cu" "F.Mask" "F.Paste")
			(roundrect_rratio 0.25)
			(net 1 "Net-(U1-V+)")
			(pinfunction "V-")
			(pintype "power_in")
		)
		(pad "5" smd roundrect
			(at 3.5875 1.905)
			(size 1.625 0.65)
			(layers "F.Cu" "F.Mask" "F.Paste")
			(roundrect_rratio 0.25)
			(net 1 "Net-(U1-V+)")
			(pinfunction "NULL")
			(pintype "input")
		)
		(pad "6" smd roundrect
			(at 3.5875 0.635)
			(size 1.625 0.65)
			(layers "F.Cu" "F.Mask" "F.Paste")
			(roundrect_rratio 0.25)
			(net 1 "Net-(U1-V+)")
			(pintype "output")
		)
		(pad "7" smd roundrect
			(at 3.5875 -0.635)
			(size 1.625 0.65)
			(layers "F.Cu" "F.Mask" "F.Paste")
			(roundrect_rratio 0.25)
			(net 1 "Net-(U1-V+)")
			(pinfunction "V+")
			(pintype "power_in")
		)
		(pad "8" smd roundrect
			(at 3.5875 -1.905)
			(size 1.625 0.65)
			(layers "F.Cu" "F.Mask" "F.Paste")
			(roundrect_rratio 0.25)
			(net 2 "unconnected-(U1-NC-Pad8)")
			(pinfunction "NC")
			(pintype "no_connect")
		)
		(embedded_fonts no)
		(model "${KICAD9_3DMODEL_DIR}/Package_SO.3dshapes/SOIC-8_5.3x5.3mm_P1.27mm.step"
			(offset
				(xyz 0 0 0)
			)
			(scale
				(xyz 1 1 1)
			)
			(rotate
				(xyz 0 0 0)
			)
		)
	)
	(zone
		(net 0)
		(net_name "")
		(layer "F.Cu")
		(name "Test1")
		(hatch edge 0.5)
		(connect_pads
			(clearance 0)
		)
		(min_thickness 0.25)
		(filled_areas_thickness no)
		(keepout
			(tracks allowed)
			(vias allowed)
			(pads allowed)
			(copperpour allowed)
			(footprints allowed)
		)
		(placement
			(enabled yes)
			(sheetname "/Test1/")
		)
		(fill
			(thermal_gap 0.5)
			(thermal_bridge_width 0.5)
		)
		(polygon
			(pts
				(xy 68.5 59.5) (xy 68.5 69.5) (xy 81 69.5) (xy 81 59.5)
			)
		)
	)
	(zone
		(net 0)
		(net_name "")
		(layer "F.Cu")
		(name "Test2")
		(hatch edge 0.5)
		(connect_pads
			(clearance 0)
		)
		(min_thickness 0.25)
		(filled_areas_thickness no)
		(keepout
			(tracks allowed)
			(vias allowed)
			(pads allowed)
			(copperpour allowed)
			(footprints allowed)
		)
		(placement
			(enabled yes)
			(sheetname "/Test2/")
		)
		(fill
			(thermal_gap 0.5)
			(thermal_bridge_width 0.5)
		)
		(polygon
			(pts
				(xy 68.5 72.5) (xy 68.5 82.5) (xy 81 82.5) (xy 81 72.5)
			)
		)
	)
	(zone
		(net 5)
		(net_name "GND")
		(layer "B.Cu")
		(name "Test2")
		(hatch edge 0.5)
		(connect_pads
			(clearance 0)
		)
		(min_thickness 0.25)
		(filled_areas_thickness no)
		(fill yes
			(thermal_gap 0.5)
			(thermal_bridge_width 0.5)
		)
		(polygon
			(pts
				(xy 67.5 58.473018) (xy 82 58.473018) (xy 82 83.473018) (xy 67.5 83.473018)
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	(embedded_fonts no)
)
