(kicad_pcb (version 20220621) (generator pcbnew)
  (general
    (thickness 1.6)
  )
  (paper "A4")
  (layers
    (0 "F.Cu" signal)
    (31 "B.Cu" signal)
    (32 "B.Adhes" user "B.Adhesive")
    (33 "F.Adhes" user "F.Adhesive")
    (34 "B.Paste" user)
    (35 "F.Paste" user)
    (36 "B.SilkS" user "B.Silkscreen")
    (37 "F.SilkS" user "F.Silkscreen")
    (38 "B.Mask" user)
    (39 "F.Mask" user)
    (40 "Dwgs.User" user "User.Drawings")
    (41 "Cmts.User" user "User.Comments")
    (42 "Eco1.User" user "User.Eco1")
    (43 "Eco2.User" user "User.Eco2")
    (44 "Edge.Cuts" user)
    (45 "Margin" user)
    (46 "B.CrtYd" user "B.Courtyard")
    (47 "F.CrtYd" user "F.Courtyard")
    (48 "B.Fab" user)
    (49 "F.Fab" user)
  )
  (setup
    (stackup
      (layer "F.SilkS" (type "Top Silk Screen"))
      (layer "F.Paste" (type "Top Solder Paste"))
      (layer "F.Mask" (type "Top Solder Mask") (color "Green") (thickness 0.01))
      (layer "F.Cu" (type "copper") (thickness 0.035))
      (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
      (layer "B.Cu" (type "copper") (thickness 0.035))
      (layer "B.Mask" (type "Bottom Solder Mask") (color "Green") (thickness 0.01))
      (layer "B.Paste" (type "Bottom Solder Paste"))
      (layer "B.SilkS" (type "Bottom Silk Screen"))
      (copper_finish "None")
      (dielectric_constraints no)
    )
    (pad_to_mask_clearance 0)
    (aux_axis_origin 96.52 144.78)
    (grid_origin 96.52 144.78)
    (pcbplotparams
      (layerselection 0x00000fc_80000001)
      (plot_on_all_layers_selection 0x0000000_00000000)
      (disableapertmacros false)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (dashed_line_dash_ratio 12.000000)
      (dashed_line_gap_ratio 3.000000)
      (svgprecision 6)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (dxfpolygonmode true)
      (dxfimperialunits true)
      (dxfusepcbnewfont true)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (sketchpadsonfab false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory "")
    )
  )
  (net 0 "")
  (net 1 "GND")
  (net 2 "+5V")
  (net 3 "+3V3")
  (net 4 "GPIO_SPI_CS#")
  (net 5 "GPIO_UART1_TXD")
  (net 6 "GPIO_SPI_MISO")
  (net 7 "GPIO_UART1_RXD")
  (net 8 "GPIO_SPI_MOSI")
  (net 9 "GPIO_UART1_CTS")
  (net 10 "GPIO_SPI_CLK")
  (net 11 "GPIO_UART1_RTS")
  (net 12 "GPIO_I2C_SCL")
  (net 13 "GPIO_I2S_CLK")
  (net 14 "GPIO_I2C_SDA")
  (net 15 "GPIO_I2S_FRM")
  (net 16 "GPIO_UART2_TXD")
  (net 17 "GPIO_I2S_DO")
  (net 18 "GPIO_UART2_RXD")
  (net 19 "GPIO_I2S_DI")
  (net 20 "GPIO_S5_0")
  (net 21 "GPIO_PWM0")
  (net 22 "GPIO_S5_1")
  (net 23 "GPIO_PWM1")
  (net 24 "GPIO_S5_2")
  (net 25 "I2SMCLK_GPIO")
  (footprint "Pin_Headers:Pin_Header_Straight_2x13" locked (layer "F.Cu")
    (at 109.855 142.24 90)
    (descr "Through hole pin header")
    (tags "pin header")
    (attr through_hole)
    (fp_text reference "P1" (at 1.27 -3.175 90) (layer "F.SilkS"))
    (fp_text value "CONN_02X13" (at 5.08 3.175 180) (layer "F.Fab") hide)
    (pad "1" thru_hole rect locked (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 1 "GND"))
    (pad "2" thru_hole oval locked (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 1 "GND"))
    (pad "3" thru_hole oval locked (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 2 "+5V"))
    (pad "4" thru_hole oval locked (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 3 "+3V3"))
    (pad "5" thru_hole oval locked (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 4 "GPIO_SPI_CS#"))
    (pad "6" thru_hole oval locked (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 5 "GPIO_UART1_TXD"))
    (pad "7" thru_hole oval locked (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 6 "GPIO_SPI_MISO"))
    (pad "8" thru_hole oval locked (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 7 "GPIO_UART1_RXD"))
    (pad "9" thru_hole oval locked (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 8 "GPIO_SPI_MOSI"))
    (pad "10" thru_hole oval locked (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 9 "GPIO_UART1_CTS"))
    (pad "11" thru_hole oval locked (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 10 "GPIO_SPI_CLK"))
    (pad "12" thru_hole oval locked (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 11 "GPIO_UART1_RTS"))
    (pad "13" thru_hole oval locked (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 12 "GPIO_I2C_SCL"))
    (pad "14" thru_hole oval locked (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 13 "GPIO_I2S_CLK"))
    (pad "15" thru_hole oval locked (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 14 "GPIO_I2C_SDA"))
    (pad "16" thru_hole oval locked (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 15 "GPIO_I2S_FRM"))
    (pad "17" thru_hole oval locked (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 16 "GPIO_UART2_TXD"))
    (pad "18" thru_hole oval locked (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 17 "GPIO_I2S_DO"))
    (pad "19" thru_hole oval locked (at 0 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 18 "GPIO_UART2_RXD"))
    (pad "20" thru_hole oval locked (at 2.54 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 19 "GPIO_I2S_DI"))
    (pad "21" thru_hole oval locked (at 0 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 20 "GPIO_S5_0"))
    (pad "22" thru_hole oval locked (at 2.54 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 21 "GPIO_PWM0"))
    (pad "23" thru_hole oval locked (at 0 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 22 "GPIO_S5_1"))
    (pad "24" thru_hole oval locked (at 2.54 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 23 "GPIO_PWM1"))
    (pad "25" thru_hole oval locked (at 0 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 24 "GPIO_S5_2"))
    (pad "26" thru_hole oval locked (at 2.54 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
      (net 25 "I2SMCLK_GPIO"))
    (model "Pin_Headers.3dshapes/Pin_Header_Straight_2x13.wrl"
      (offset (xyz 1.269999981 -15.23999977 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 90))
    )
  )
  (footprint "Mounting_Holes:MountingHole_3-5mm" locked (layer "F.Cu")
    (at 191.77 140.97)
    (descr "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
    (tags "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
    (fp_text reference "MK2" (at 0 -4.50088) (layer "F.SilkS") hide)
    (fp_text value "Mounting_Hole" (at 0 5.00126) (layer "F.Fab") hide)
    (pad "" np_thru_hole circle locked (at 0 0) (size 3.5 3.5) (drill 3.5) (layers F&B.Cu *.Mask))
  )
  (footprint "Mounting_Holes:MountingHole_3-5mm" locked (layer "F.Cu")
    (at 100.33 140.97)
    (descr "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
    (tags "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
    (fp_text reference "MK1" (at 0 -4.50088) (layer "F.SilkS") hide)
    (fp_text value "Mounting_Hole" (at 0 5.00126) (layer "F.Fab") hide)
    (pad "" np_thru_hole circle locked (at 0 0) (size 3.5 3.5) (drill 3.5) (layers F&B.Cu *.Mask))
  )
  (footprint "Mounting_Holes:MountingHole_3-5mm" locked (layer "F.Cu")
    (at 100.33 74.93)
    (descr "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
    (tags "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
    (fp_text reference "MK4" (at 0 -4.50088) (layer "F.SilkS") hide)
    (fp_text value "Mounting_Hole" (at 0 5.00126) (layer "F.Fab") hide)
    (pad "" np_thru_hole circle locked (at 0 0) (size 3.5 3.5) (drill 3.5) (layers F&B.Cu *.Mask))
  )
  (footprint "Mounting_Holes:MountingHole_3-5mm" locked (layer "F.Cu")
    (at 191.77 74.93)
    (descr "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
    (tags "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,")
    (fp_text reference "MK3" (at 0 -4.50088) (layer "F.SilkS") hide)
    (fp_text value "Mounting_Hole" (at 0 5.00126) (layer "F.Fab") hide)
    (pad "" np_thru_hole circle locked (at 0 0) (size 3.5 3.5) (drill 3.5) (layers F&B.Cu *.Mask))
  )
  (footprint "Resistor_SMD:R_0201_0603Metric" (layer "F.Cu")
    (at 108.52 103.78)
    (descr "Resistor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator")
    (tags "resistor")
    (attr smd)
    (fp_text reference "REF**" (at 0 -1.05) (layer "F.SilkS"))
    (fp_text value "R_0201_0603Metric" (at 0 1.05) (layer "F.Fab"))
    (fp_text user "${REFERENCE}" (at 0 -0.68) (layer "F.Fab"))
    (pad "" smd roundrect locked (at -0.345 0) (size 0.318 0.36) (layers "F.Paste") (roundrect_rratio 0.25))
    (pad "" smd roundrect locked (at 0.345 0) (size 0.318 0.36) (layers "F.Paste") (roundrect_rratio 0.25))
    (pad "1" smd roundrect locked (at -0.32 0) (size 0.46 0.4) (layers "F.Cu" "F.Mask") (roundrect_rratio 0.25))
    (pad "2" smd roundrect locked (at 0.32 0) (size 0.46 0.4) (layers "F.Cu" "F.Mask") (roundrect_rratio 0.25))
    (model "${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0201_0603Metric.wrl"
      (offset (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )
  (gr_line (start 195.58 71.12) (end 96.52 71.12)
    (layer "Edge.Cuts"))
  (gr_line (start 96.52 144.78) (end 195.58 144.78)
    (layer "Edge.Cuts"))
  (gr_line (start 195.58 144.78) (end 195.58 71.12)
    (layer "Edge.Cuts"))
  (gr_line (start 96.52 71.12) (end 96.52 144.78)
    (layer "Edge.Cuts"))
  (target plus (at 96.52 144.78) (size 5) (width 0.15) (layer "Edge.Cuts"))
  (zone (net 0) (net_name "") (layer "B.Cu") (name "NoBottomFootprints") (hatch full 0.508)
    (connect_pads (clearance 0))
    (min_thickness 0.254) (filled_areas_thickness no)
    (keepout (tracks allowed) (vias allowed) (pads allowed) (copperpour allowed) (footprints allowed))
    (fill (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 114.96 110.15)
        (xy 96.52 110.15)
        (xy 96.52 92.05)
        (xy 114.96 92.05)
      )
    )
  )
  (zone (net 0) (net_name "") (layer "B.Cu") (name "NoBottomFootprints") (hatch full 0.508)
    (connect_pads (clearance 0))
    (min_thickness 0.254) (filled_areas_thickness no)
    (keepout (tracks allowed) (vias allowed) (pads allowed) (copperpour allowed) (footprints not_allowed))
    (fill (thermal_gap 0.508) (thermal_bridge_width 0.508))
    (polygon
      (pts
        (xy 195.58 112.02)
        (xy 178.86 112.02)
        (xy 178.86 96.83)
        (xy 195.58 96.83)
      )
    )
  )
)
